Talk Around Town: Samsung Claims Its zHBM Concept Could Flip AI Memory on Its Head

What the Chatter Is All About

Well, butter my biscuit and call it a semiconductor revival—the Future of Memory and Storage 2026 conference rolled through Santa Clara this week, and the buzz has been louder than a hound dog at a catfish fry. Samsung, SK Hynix, and SanDisk all showed up with architectural ideas that, if they ever pan out, would redraw how memory sits inside an AI compute package. The short version: instead of everybody arguing about who can make the fastest conventional memory chip, the companies say the real fight is now about where the memory physically lives in relation to the processor.

Samsung says it presented concept models at FMS 2026 for two new designs it calls zHBM and zNAND-O, which the company describes as the industry's first such concepts for next-generation 3D memory aimed at AI computing. Meanwhile, competitor SK Hynix teamed up with SanDisk to drop what the two companies describe as the first open standard for something called High Bandwidth Flash—published through the Open Compute Project, with Google and Tenstorrent also along for the ride. These are not shipping products; they are, at present, big bets on a future that has not arrived yet.

What Samsung Actually Says It Showed

According to Samsung, zHBM would move high-bandwidth memory off the interposer—where it currently sits beside the processor like a neighbor sharing a fence—and stack it directly on top of the AI accelerator die using through-silicon via connections. The company says that geometry means data travels vertically through the package rather than horizontally across a substrate, which Samsung claims would yield higher bandwidth and better power efficiency. Think of swapping a long garden hose for a short one: Samsung is betting the shorter path matters a whole lot.

The performance numbers Samsung is claiming are, frankly, the kind that make a person stop and squint. According to TechTimes, Samsung's CTO Song Jae-hyuk first put specific figures on the table at SEMICON Korea back in February 2026, stating that zHBM delivers four times HBM4's data transfer speed while drawing only one-quarter of the power. TechTimes notes that if you apply that multiplier to HBM4's roughly 2 TB/s ceiling, you land at a theoretical 8 TB/s per stack—but no independent benchmarks have touched these numbers, and the whole thing remains unverified.

Samsung also says it introduced its V10 BV-NAND at FMS 2026, which the company describes as the industry's first NAND using wafer bonding technology to exceed 400 layers. According to Samsung's newsroom, the V10 delivers roughly 58% higher memory density than its previous V9 generation. Separately, Samsung describes a concept called zNAND-O, framed as part of the same 3D memory vision, though detailed specifications on that one are thin. All of these descriptions come from Samsung's own announcements and have not been independently corroborated.

What SK Hynix and SanDisk Say They Brought

Not to be outshone at their own family reunion, SK Hynix and SanDisk announced what they describe as a new storage tier sitting between HBM and conventional SSDs. According to the two companies, this High Bandwidth Flash standard is meant to tackle the AI era's twin headaches of bandwidth and capacity at the same time—like a pick-up truck that's somehow also a race car. The open standard, published via the Open Compute Project, supports up to 512 GB per device using 8-high and 16-high NAND stacks, the companies say.

EE Times India and VarIndia both confirmed the announcement occurred and named the Open Compute Project as the publishing vehicle, which at least establishes that the specification is real and publicly accessible. SK Hynix has pointed toward early 2027 as its target window for HBF-based SSDs, though that timeline comes from the company itself and should be treated accordingly. Google and Tenstorrent are listed as consortium participants, which gives the standard a bit more weight than a purely bilateral vendor agreement—though participation in a spec effort is a long walk from shipping hardware.

What Remains Unverified and Genuinely Murky

Here is where we stop and remind everybody that we are essentially reading a menu at a restaurant that hasn't opened yet. Samsung's zHBM and zNAND-O are concept-stage designs with no announced production timeline whatsoever. Every single performance claim—the 4× HBM4 bandwidth figure, the assertion of 10× HBM5 density, the claim of half the thermal resistance—originates from Samsung's own statements and has not been subjected to independent measurement. The Samsung newsroom and its branded semiconductor event page are, as the source assessment notes, two self-reported sources that cannot independently verify each other.

TechPowerUp and TechTimes both covered the Samsung announcements, but analyst Mark Lapedus writing on Substack—probably the closest thing to independent expert framing available here—produced a brief note that still draws on the same Samsung announcement as its foundation. So the evidentiary chain is shorter than a june bug's attention span. The HBF standard is at specification stage only, meaning no mass-production devices based on it are yet in the wild. Whether zHBM, HBF, or some third option ends up reshaping AI memory at scale is, at this point, genuinely unknown.

The Dissenting Voice in the Room

Now, not everyone at FMS 2026 was nodding along to the 'more and better HBM fixes everything' sermon. According to TechTimes' preview coverage, a Thursday session by Prof. Tong Zhang of ScaleFlux took a harder look at the economic ceiling of building large-scale AI inference infrastructure around HBM as the primary memory tier. That session, confirmed as part of the program, examined architectural alternatives rather than just accepting HBM dominance as inevitable. It is worth noting because it represents a genuine counterpoint to the prevailing narrative at the conference, and it is the kind of dissent that tends to age well—or poorly—depending on how the next three years shake out.

Analysis: A Rodeo With Three Very Different Bulls

This is analysis, not reporting—but it is hard to watch this week's announcements and not notice that the industry is now arguing about architecture in a way it wasn't a couple of years ago. Samsung's zHBM bet is essentially that the physical distance between memory and processor is the next frontier to collapse. SK Hynix and SanDisk's HBF bet is that a new middle tier of storage can soak up capacity pressure without requiring every AI box to be stuffed full of expensive HBM. These are not complementary visions; they are competing answers to the same question.

There is also a third contender lurking off-stage: BigGo Finance noted pre-event reporting from Korean industry sources flagging Samsung's competitive positioning relative to SK Hynix, and separately, analyst coverage has mentioned Intel and SAIMEMORY's ZAM architecture—previewed at VLSI Symposium 2026—as a different stacking geometry targeting a 2028–2030 window with its own bandwidth claims. That one did not get prominent airtime at FMS 2026, but it exists. The AI memory rodeo, in other words, has more bulls than seats, and it is entirely unclear which one stays on for eight seconds.

TrendForce, as cited by TechTimes, frames 2026 through 2028 as a structural supercycle for HBM constrained by HBM4's manufacturing complexity—which is itself an uncertain projection from a market research firm rather than settled fact. Samsung is reportedly targeting roughly 50% HBM capacity expansion in 2026, per TechTimes, but that figure also comes from industry reporting rather than confirmed company guidance. The honest summary is that a lot of smart people with a lot of money are making educated guesses, and the rest of us are watching from the fence with a sweet tea.